Summary: Buses in computers.Buses are the basic transportation lines for moving data, instructions,addresses, and other information inside a computer.
- bus
- bus standards
Buses
Abus is a set (group) of parallel lines that information (data,addresses, instructions, and other information) travels on inside a computer.Information travels on buses as a series of electrical pulses, each pulserepresenting a one bit or a zero bit (there are trinary, or three-state, buses,but they are rare). Some writers use the term buss with a double ‘s’.
Thesize or width of a bus is how many bits it carries in parallel.Common bus sizes are: 4 bits, 8 bits, 12 bits, 16 bits, 24 bits, 32 bits, 64bits, 80 bits, 96 bits, and 128 bits.
Thespeed of a bus is how fast it moves data along the path. This is usuallymeasured in MegaHertz (MHz) or millions of times a second.
Thecapacity of a bus is how much data it can carry in a second. In theorythis is determined by multiplying the size of the bus by the speed of the bus,but in practice there are many factors that slow down a bus, including waitcycles (waiting for memory or another device to have information ready).
Somerecent buses move two sets of data through the bus during each cycle (one afterthe other). This is called double pumping the bus.
Aninternal bus is a bus inside the processor, moving data, addresses,instructions, and other information between registers and other internalcomponents or units.
Anexternal bus is a bus outside of the processor (but inside thecomputer), moving data, addresses, and other information between majorcomponents (including cards) inside the computer.
Abus master is a combination of circuits, control microchips, andinternal software that control the movement of information over a bus. Theinternal software (if any) is contained inside the bus master and is separatefrom the main processor.
Aprocessor bus is a bus inside the processor. Some processor designssimplify the internal structure by having one or two processor buses. In asingle processor bus system, all information is carried around inside theprocessor on one processor bus. In a dual processor bus system, there is a sourcebus dedicated to moving source data and a destination bus dedicatedto moving results. An alternative approach is to have a lot of small buses thatconnect various units inside the processor. While this design is more complex,it also has the potential of being faster, especially if there are multipleunits within the processor that can perform work simultaneously (a form of parallelprocessing).
Asystem bus connects the main processor with its primary support components,in particular connecting the processor to its memory. Depending on thecomputer, a system bus may also have other major components connected.
Adata bus carries data. Most processors have internal data buses thatcarry information inside the processor and external data buses that carryinformation back and forth between the processor and memory.
Anaddress bus carries address information. In most processors, memory isconnected to the processor with separate address and data buses. The processorplaces the requested address in memory on the address bus for memory or thememory controller (if there is more than one chip or bank of memory, there willbe a memory controller that controls the banks of memory for the processor). Ifthe processor is writing data to memory, then it will assert a write signal andplace the data on the data bus for transfer to memory. If the processor isreading data from memory, then it will assert a read signal and wait for datafrom memory to arrive on the data bus.
Insome small processors the data bus and address bus will be combined into asingle bus. This is called multiplexing. Special signals indicatewhether the multiplexed bus is being used for data or address. This is at leasttwice as slow as separate buses, but greatly reduces the complexity and cost ofsupport circuits, an important factor in the earliest days of computers, in theearly days of microprocessors, and for small embedded processors (such as in amicrowave oven, where speed is unimportant, but cost is a major factor).
Aninstruction bus is a specialized data bus for fetching instructions frommemory. The very first computers had separate storage areas for data andprograms (instructions). John Von Neumann introduced the von Neumannarchitecture, which combined both data and instructions into a single memory,simplifying computer architecture. The difference between data and instructionswas a matter of interpretation. In the 1970s, some processors implementedhardware systems for dynamically mapping which parts of memory were for code(instructions) and which parts were for data, along with hardware to insurethat data was never interpretted as code and that code was never interprettedas data. This isolation of code and data helped prevent crashes or otherproblems from “runaway code” that started wiping out other programs byincorrectly writing data over code (either from the same program or worse fromsome other user’s software). In more recent innovation, super computers andother powerful processors added separate buses for fetching data andinstructions. This speeds up the processor by allowing the processor to fetchthe next instruction (or group of instructions) at the same time that it isreading or writing data from the current or preceding instruction.
Amemory bus is a bus that connects a processor to memory or connects aprocessor to a memory controller or connects a memory controller to a memorybank or memory chip.
Acache bus is a bus that connects a processor to its internal (L1 orLevel 1) or external (L2 or Level 2) memory cache or caches.
AnI/O bus (for input/output) is a bus that connects a processor to itssupport devices (such as internal hard drives, external media, expansion slots,or peripheral ports). Typically the connection is to controllers rather thandirectly to devices.
Agraphics bus is a bus that connects a processor to a graphics controlleror graphics port.
Alocal bus is a bus for items closely connected to the processor that canrun at or near the same speed as the processor itself.
busstandards
ISA (Industry Standard Architecture) isa bus system for IBM PCs and PC clones. The original standard, from 1981, wasan 8 bit bus that ran at 4.77 MHz. In 1984, with the introduction of the IBM ATcomputer (which used the 80286 processor, introduced by Intel in 1982), ISA wasexpanded to a 16 bit bus that ran at 8.3 MHz.
MCA (Micro Channel Architecture) is a32 bit bus introduced in 1987 by IBM with the PS/2 computer that used the Intel80386 processor. IBM attempted to license MCA bus to other manufacturers, butthey rejected it because of the lack of ability to use the wide variety ofexisting ISA devices. IBM continues to use a modern variation of MCA in some ofits server computers.
EISA (Extended Industry StandardArchitecture) is a 32 bit bus running at 8.3 MHz created by the clone industryin response to the MCA bus. EISA is backwards compatible so that ISA devicescould be connected to it. EISA also can automatically set adaptor cardconfigurations, freeing users from having to manually set jumper switches.
NuBus is a 32 bit bus created by TexasInstruments and used in the Macintosh II and other 680x0 based Macintoshes.NuBus supports automatic configuration (for “plug and play”).
VLbus (VESA Localbus) is created in 1992 by the Video Electronics Standards Association for theIntel 80486 processor. The VL bus is 32 bits and runs at 33 MHz. The VL busrequires use of manually set jumper switches.
PCI (Peripheral Component Interconnect)is a bus created by Intel in 1993. PCI is available in both a 32 bit versionrunning at 33 MHz and a 64 bit version running at 66 MHz. PCI supportsautomatic configuration (for “plug and play”). PCI automatically checks datatransfers for errors. PCI uses a burst mode, increasing bus efficiency bysending several sets of data to one address.
DIB (Dual Independent Bus) was createdby Intel to increase the performance of frontside L2 cache.
SECC (Single Edge Contact Cartridge) wascreated by Intel for high speed backside L2 cache.
AGP (Accelerated Graphics Port) wascreated by Intel to increase performance by separating video data from the restof the data on PCI I/O buses. AGP is 32 bits and runs at 66 MHz. AGP 2X doublepumps the data, doubling the amount of throughput at the same bus width andspeed. AGP 4X runs four sets of data per clock, quadrupling the throughput.
DRDRAM was a memory bus created by Rambusto increase speed of connections between the processor and memory. DRDRAM is a33 bit bus running at 800 MHz. 16 bits are for data, with the other 17 bitsreserved for address functions.